Scenario-based verification of real-time systems using Uppaal

This article proposes two approaches to tool-supported automatic verification of dense real-time systems against scenario-based requirements, where a system is modeled as a network of timed automata (TAs) or as a set of driving live sequence charts (LSCs), and a requirement is specified as a separate monitored LSC chart. We make timed extensions to a kernel subset of the LSC language and define a tracebased semantics. By translating a monitored LSC chart to a behavior-equivalent observer TA and then non-intrusively composing this observer with the original TA-modeled realtime system, the problems of scenario-based verification reduce to computation tree logic (CTL) real-time model checking problems. When the real-time system is modeled as a set of driving LSC charts, we translate these driving charts and the monitored chart into a behaviorequivalent network of TAs by using a “one-TA-per-instance line” approach, and then reduce the problems of scenario-based verification also to CTL real-time model checking problems. We show how we exploit the expressivity of the TA formalism and the CTL query language This work has been supported by the ICT competence center CISS (Center for Embedded Software Systems) and the advanced technology platform DaNES (Danish Network for intelligent Embedded Systems). S. Li ( ) · A. David · K.G. Larsen · B. Nielsen · S. Pusinskas CISS, Department of Computer Science, Aalborg University, Aalborg, Denmark e-mail: [email protected] A. David e-mail: [email protected] K.G. Larsen e-mail: [email protected] B. Nielsen e-mail: [email protected] S. Pusinskas e-mail: [email protected] S. Balaguer LSV, ENS Cachan/INRIA, Cachan Cedex, France e-mail: [email protected] Form Methods Syst Des of the real-time model checker UPPAAL to accomplish these tasks. The proposed two approaches are implemented in the UPPAAL tool and built as a tool chain, respectively. We carry out a number of experiments with both verification approaches, and the results indicate that these methods are viable, computationally feasible, and the tools are effective.